Sorting in Memristive Memory

Sorting data is needed in many application domains. Traditionally, the read from memory and sent to a general-purpose processor or application-specific hardware for sorting. The sorted then written back memory. Reading/writing from/to transferring between processing unit incur significant latency energy overhead. In this work, we develop first architectures in-memory sorting of best our knowledge. We propose two architectures. architecture applicable conventional format representing data, i.e., weighted binary radix. second proposed developing unary systems, where encoded as uniform bit-streams. As present, each has different advantages disadvantages, making one other more suitable specific application. However, common property both reduction time compared prior designs. Our evaluations show on average 37 × 138× designs, respectively, CMOS off-memory systems 45 nm technology. designed 3×3 5×5 Median filter using solutions, which used 64×64 pixel images. results 14× 634× latency, with binary, 5.6× 152×10 3 approach those designs filtering system.